Dehir, Nizar, Mak, Terrence, Fei, Xia and Alex, Yakovlev
(2014)
Modeling and tools for power supply variations analysis in networks-on-chip.
IEEE Transactions on Computers, 63 (3), .
(doi:10.1109/TC.2012.272).
Tarawneh, Gareth, Yakovlev, Alex and Mak, Terrence
(2014)
Eliminating synchronization latency using sequenced latching.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 22 (2), .
(doi:10.1109/TVLSI.2013.2243177).
Dahir, Nizar, Al-Dujaily, Ra'ed, Mak, Terrence and Yakovlev, Alex
(2014)
Thermal optimization in network-on-chip-based 3D chip multiprocessors using dynamic programming networks.
[in special issue: Real-Time and Embedded Technology and Applications, Domain-Specific Multicore Computing, Cross-Layer Dependable Embedded Systems, and Application of Concurrency to System Design (ACSD'13)]
ACM Transactions on Embedded Computing Systems, 13 (4s), , [139].
(doi:10.1145/2584668).
AL-DUJAILY, RAAED, Li, An, Maunder, Robert, Mak, Terrence, Al-Hashimi, Bashir and Hanzo, Lajos
(2016)
A Scalable Turbo Decoding Algorithm for High-Throughput Network-on-Chip Implementation.
University of Southampton
doi:10.5258/SOTON/397738
[Dataset]
Karkar, Ammar, Mak, Terrence, Tong, Kin-Fai and Yakolev, Alex
(2016)
A survey of emerging interconnects for on-chip efficient multicast and broadcast in many-cores.
IEEE Circuits and Systems Magazine, 16 (1), .
(doi:10.1109/MCAS.2015.2510199).
Opoku Agyeman, M., Vien, Q., Ahmadinia, Ali, Yakovlev, A., Tong, K. and Mak, T.
(2017)
A resilient 2-D waveguide communication fabric for hybrid wired-wireless NoC design.
IEEE Transactions on Parallel and Distributed Systems, 28 (2), .
(doi:10.1109/TPDS.2016.2575836).
Karkar, A., Mak, T., Tong, K. and Yakovlev, A.
(2016)
Network-on-chip multicast architectures using hybrid wire and surface-wave interconnects.
IEEE Transaction on Emerging Topics in Computing, .
(doi:10.1109/TETC.2016.2551043).
Ng, J., Singh, A., Wang, X. and Mak, T.
(2016)
Defragmentation for efficient runtime resource management in NoC-based many-core systems.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 24 (11), .
(doi:10.1109/TVLSI.2016.2548564).
Wang, X., Zhao, B., Wang, L., Mak, T., Yang, M. and Daneshtalab, M.
(2016)
A pareto-optimal runtime power budgeting scheme for many-core systems.
Microprocessors and Microsystems, 46, part B, .
(doi:10.1016/j.micpro.2016.03.006).
Fei, T., Wang, X., Zhang, B. and Mak, T.
(2016)
On runtime adaptive tile defragmentation for resource management in many-core systems.
Microprocessors and Microsystems, 46, part B, .
(doi:10.1016/j.micpro.2016.02.004).
Wang, X., Zhao, B., Mak, T., Yang, M., Jiang, Y. and Daneshtalab, M.
(2016)
On fine-grained runtime power budgeting for networks-on-chip systems.
IEEE Transactions on Computers, 65 (9), .
(doi:10.1109/TC.2015.2506565).
Liu, Q., Ji, W., Chen, Q. and Mak, T.
(2016)
IP protection of mesh NoCs using square spiral routing.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 24 (4), .
(doi:10.1109/TVLSI.2015.2462842).
Agyeman, M., Tong, K. and Mak, T.
(2015)
An improved wireless communication fabric for emerging Network-on-Chip design.
[in special issue: The 10th International Conference on Future Networks and Communications (FNC 2015) / The 12th International Conference on Mobile Systems and Pervasive Computing (MobiSPC 2015) Affiliated Workshops]
Procedia Computer Science, 56, .
(doi:10.1016/j.procs.2015.07.229).
Yi, W., Lo, K., Mak, T., Leung, K., Leung, Y. and Meng, H.
(2015)
A survey of wireless sensor network based air pollution monitoring systems.
Sensors, 15 (12), .
(doi:10.3390/s151229859).
Wang, X., Zhao, B., Mak, T., Yang, M. and Daneshtalab, M.
(2015)
An efficient runtime power allocation scheme for many-core systems inspired from auction theory.
Integration the VLSI Journal, 50, .
(doi:10.1016/j.vlsi.2014.11.001).
Luo, R., Coapes, G., Mak, T., Tadashi, Y., Degena, P. and Tin, C.
(2016)
Real-time simulation of passage-of-time encoding in cerebellum using a scalable FPGA-based system.
IEEE Transactions on Biomedical Circuits and Systems, 10 (3), .
(doi:10.1109/TBCAS.2015.2460232).
(PMID:26452290)
Al-Dujaily, Ra'ed, Li, An, Maunder, Robert G, Mak, Terrence, Al-Hashimi, Bashir M. and Hanzo, Lajos
(2016)
A scalable turbo decoding algorithm for high-throughput network-on-chip implementation.
IEEE Access, .
(doi:10.1109/ACCESS.2016.2628801).
Wang, Xiaohang, Singh, Amit, Li, Bing, Yang, Yang, Li, Hong and Mak, Terrence
(2018)
Bubble budgeting: throughput optimization for dynamic workloads by exploiting dark cores in many core systems.
IEEE Transactions on Computers, 67 (2), .
(doi:10.1109/TC.2017.2735967).
Fletcher, Benjamin, James, Das, Shidhartha and Mak, Terrence
(2017)
Dataset supporting the paper entitled “A High-Speed Design Methodology for Inductive Coupling Links in 3D-ICs”.
University of Southampton
doi:10.5258/SOTON/D0312
[Dataset]
Fletcher, Benjamin, James, Das, Shidhartha, Poon, Chi-Sang and Mak, Terrence
(2017)
Dataset supporting the paper entitled “Low-Power 3D Integration using Inductive Coupling Links for Neurotechnology Applications".
University of Southampton
doi:10.5258/SOTON/D0318
[Dataset]
Wang, Ling and Mak, Terrence
(2018)
A Fault-Tolerant Routing Algorithm Using Tunnels in Fault Blocks for Network-on-Chip.
Journal of Circuits, Systems and Computers, 27 (2), [1850022].
(doi:10.1142/S0218126618500226).
Fletcher, Benjamin J., Das, Shidhartha and Mak, Terrence
(2018)
A high-speed design methodology for inductive coupling links in 3D-ICs.
In 2018 Design, Automation and Test in Europe Conference and Exhibition (DATE).
vol. 2018-January,
IEEE.
.
(doi:10.23919/DATE.2018.8342059).
Fletcher, Benjamin James, Das, Shidhartha, Poon, Chi-Sang and Mak, Terrence
(2018)
Low-power 3D integration using inductive coupling links for neurotechnology applications.
Design Automation and Test in Europe, , Dresden, Germany.
19 - 23 Mar 2018.
6 pp
.
Wang, Liang, Wang, Xiaohang, Leung, Ho Fung and Mak, Terrence
(2018)
Runtime task mapping for lifetime budgeting in many-core systems.
In FDL 2017 - Proceedings of the 2017 Forum on Specification and Design Languages.
vol. 2017-September,
IEEE Computer Society.
.
(doi:10.1109/FDL.2017.8303900).
Mak, Terrence, Matsutani, Hiroki and Pande, Partha Pratim
(2018)
Special session on bringing cores closer together: the wireless revolution in on-chip communication.
In Proceedings - 2018 IEEE 36th VLSI Test Symposium, VTS 2018.
vol. 2018-April,
IEEE Computer Society Press.
.
(doi:10.1109/VTS.2018.8368638).
Long, Zijun, Wang, Xiaohang, Jiang, Yingtao, Cui, Guofeng, Zhang, Li and Mak, Terrence
(2018)
Improving the efficiency of thermal covert channels in multi-/many-core systems.
In Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018.
vol. 2018-January,
Institute of Electrical and Electronics Engineers Inc.
.
(doi:10.23919/DATE.2018.8342241).
Leung, Yee, Leung, Kwong Sak, Wong, Man Hong, Mak, Terrence, Cheung, Kwan Yau, Lo, Leung Yau, Yi, Wei Ying and Dong, Yuan Lin
(2018)
An integrated web-based air pollution decision support system – a prototype.
International Journal of Geographical Information Science, 32 (9), .
(doi:10.1080/13658816.2018.1460752).
Wang, Liang, Wang, Xiaohang, Leung, Ho Fung and Mak, Terrence
(2018)
A non-minimal routing algorithm for aging mitigation in 2D-mesh NoCs.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
(doi:10.1109/TCAD.2018.2855149).
Wang, Liang, Lv, Ping, Liu, Leibo, Han, Jie, Leung, Ho Fung, Wang, Xiaohang, Yin, Shouyi, Wei, Shaojun and Mak, Terrence
(2018)
A lifetime reliability-constrained runtime mapping for throughput optimization in many-core systems.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
(doi:10.1109/TCAD.2018.2855168).
Zhang, Li, Wang, Xiaohang, Jiang, Yingtao, Yang, Mei, Mak, Terrence and Singh, Amit Kumar
(2018)
Effectiveness of HT-assisted sinkhole and blackhole denial of service attacks targeting mesh networks-on-chip.
Journal of Systems Architecture, 89, .
(doi:10.1016/j.sysarc.2018.07.005).
Fletcher, Benjamin, James, Das, Shidhartha and Mak, Terrence
(2018)
Dataset supporting the article entitled "Design and Optimisation of Inductive Coupling Links for 3D-ICs".
University of Southampton
doi:10.5258/SOTON/D0707
[Dataset]
Fletcher, Benjamin, James, Das, Shidhartha and Mak, Terrence
(2018)
Dataset supporting the article entitled "CoDAPT: A Concurrent Data And Power Transceiver for Fully Wireless 3D-ICs".
University of Southampton
doi:10.5258/SOTON/D0728
[Dataset]
Yang, Shufan, Wong-Lin, Kong Fatt, Andrew, James, Mak, Terrence and McGinnity, T. Martin
(2018)
A neuro-inspired visual tracking method based on programmable system-on-chip platform.
Neural Computing and Applications, 30 (9), .
(doi:10.1007/s00521-017-2847-5).
Ding, Qian, Fletcher, Benjamin J. and Mak, Terrence
(2018)
Globally Wireless Locally Wired (GloWiLoW): A clock distribution network for many-core systems.
In 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings.
vol. 2018-May,
Institute of Electrical and Electronics Engineers Inc..
(doi:10.1109/ISCAS.2018.8351041).
Fletcher, Benjamin, James, Das, Shidhartha and Mak, Terrence
(2018)
Cost-effective 3D integration using inductive coupling links: Can we make stacking silicon as easy as stacking Lego?
Arm Research Summit 2018, Robinson College, Cambridge, United Kingdom.
17 - 19 Sep 2018.
Fletcher, Benjamin, James, Das, Shidhartha and Mak, Terrence
(2019)
CoDAPT: a concurrent data and power transceiver for fully wireless 3D-ICs.
In 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).
IEEE.
6 pp
.
(doi:10.23919/DATE.2019.8714863).
Fletcher, Benjamin J., Das, Shidhartha and Mak, Terrence
(2019)
Design and optimization of inductive-coupling links for 3-D-ICs.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 27 (3), .
(doi:10.1109/TVLSI.2018.2881075).
Zhao, Yiming, Wang, Xiaohang, Jiang, Yingtao, Mei, Yang, Singh, Amit Kumar and Mak, Terrence
(2019)
On a new hardware Trojan attack on power budgeting of many core systems.
Stan, Mircea, Sridhar, Ramalingam, Bhatia, Karan, Alioto, Massimo and Li, Helen
(eds.)
In Proceedings - 31st IEEE International System on Chip Conference, SOCC 2018.
vol. 2018-September,
IEEE Computer Society.
.
(doi:10.1109/SOCC.2018.8618565).
Ding, Q. and Mak, T.
(2019)
Hybrid interconnect network for on-chip low-power clock distribution.
Electronics Letters, 55 (5), .
(doi:10.1049/el.2018.6570).
Fletcher, Benjamin, James, Das, Shidhartha and Mak, Terrence
(2019)
Dataset supporting the article entitled "A Low-Energy Inductive Transceiver using Spike-Latency Encoding for Wireless 3D Integration".
University of Southampton
doi:10.5258/SOTON/D0949
[Dataset]
Fletcher, Benjamin, James, Das, Shidhartha and Mak, Terrence
(2019)
A low-energy inductive transceiver using spike-latency encoding for wireless 3D integration.
In ACM/IEEE International Symposium on Low Power Electronics and Design : ISLPED 2019.
6 pp
.
(doi:10.1109/ISLPED.2019.8824866).
Xiao, Siyuan, Wang, Xiaohang, Palesi, Maurizio, Singh, Amit Kumar and Mak, Terrence
(2019)
ACDC: An accuracy- and congestion-aware dynamic traffic control method for networks-on-chip.
In 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).
IEEE.
.
(doi:10.23919/DATE.2019.8715189).
Fletcher, Benjamin, James, Das, Shidhartha and Mak, Terrence
(2019)
A 10.8pJ/bit pulse-position inductive transceiver for low-energy wireless 3D integration.
In IEEE European Solid-State Circuits Conference (ESSCIRC).
vol. 49,
IEEE.
4 pp
.
Gao, Weidong, Mak, Terrence and Yang, Lie Liang
(2019)
Type-spread molecular communications: principles and inter-symbol interference mitigation.
In 2019 IEEE International Conference on Communications, ICC 2019 - Proceedings.
vol. 2019-May,
IEEE.
.
(doi:10.1109/ICC.2019.8761545).
Li, Bing, Wang, Xiaohang, Singh, Amit Kumar and Mak, Terrence
(2019)
On Runtime Communication and Thermal-Aware Application Mapping and Defragmentation in 3D NoC Systems.
IEEE Transactions on Parallel and Distributed Systems, 30 (12), , [8733089].
(doi:10.1109/TPDS.2019.2921542).
Fletcher, Benjamin James, Das, Shidhartha and Mak, Terrence
(2020)
A spike-latency transceiver with tuneable pulse control for low-energy wireless 3D integration.
IEEE Journal of Solid State Circuits, 55 (9), , [9086615].
(doi:10.1109/JSSC.2020.2989543).
Fletcher, Benjamin James, Mak, Terrence and Das, Shidhartha
(2020)
A 3D-stacked cortex-M0 SoC with 20.3Gbps/mm2 7.1mW/mm2 simultaneous wireless inter-tier data and power transfer.
In Proceedings of 2020 IEEE Symposium on VLSI Circuits.
(In Press)