Embedded systems based on system-on-chip (SoC) are making their way into more and more devices, from household appliances to hand-held devices, from satellite applications to automobiles, sensors, etc. Since many of these systems are battery powered, power consumption is a prime design issue to extend battery life. Also, to optimize system performance the design of efficient on-chip communication architecture is a crucial design requirement.
An emerging requirement of the current and the future SoCs is the ability to operate in the presence of soft errors caused by radiation. However, addressing the power minimization and reliability improvement simultaneously is difficult because lowering voltage to reduce power consumption has been reported to exponentially increase the number of transient faults or soft errors. Such power reduction also causes degradation of system performance as operating frequency is also reduced. Therefore, with increasing complexity of applications and short time-to-market requirements, the design of low power, efficient and reliable system is a truly challenging task.
The aim of this project is to develop efficient on-chip communication architectures for multiprocessor SoCs and to devise system-level design techniques, which are able to simultaneously meet both low power consumption and reliability requirements. The impact of soft errors on reliability is investigated at application-level rather than at architectural-level. Based on the investigation, novel power minimization technique has been developed meeting a specified acceptable-level reliability and real-time performance for a given soft error rate. Furthermore, the impact of application system tasks mapping on reliability has been studied. Underpinning this study, a novel design optimization technique has been developed to jointly minimize power consumption through voltage scaling and the number of soft errors experienced through application task mapping. The effectiveness of the proposed techniques is evaluated using different applications, including MPEG-2 video decoder and random task graphs.